By Bart Vermeulen,Kees Goossens
This ebook describes an method and helping infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), permitting its linked product to be brought into the industry extra quickly. Readers study step by step the main specifications for debugging a contemporary, silicon SOC implementation, 9 components that complicate this debugging job, and a brand new debug process that addresses those necessities and complicating factors. The authors’ novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug method is mentioned intimately, displaying the way it is helping to satisfy debug specifications and tackle the 9, formerly pointed out components that complicate debugging silicon implementations of SOCs. The authors additionally derive the debug infrastructure specifications to aid debugging of a silicon implementation of an SOC with their CSAR debug method. This debug infrastructure involves a typical on-chip debug structure, a configurable automatic design-for-debug circulation for use throughout the layout of an SOC, and customizable off-chip debugger software program. insurance comprises an overview of the potency and effectiveness of the CSAR strategy and its assisting infrastructure, utilizing six commercial SOCs and an illustrative, instance SOC model. The authors additionally quantify the price and layout attempt to aid their approach.
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Additional info for Debugging Systems-on-Chip: Communication-centric and Abstraction-based Techniques (Embedded Systems)
Debugging Systems-on-Chip: Communication-centric and Abstraction-based Techniques (Embedded Systems) by Bart Vermeulen,Kees Goossens
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